A Wideband Low-power Continuous-time Delta-Sigma Modulator for Next Generation Wireless Applications - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook A Wideband Low-power Continuous-time Delta-Sigma Modulator for Next Generation Wireless Applications write by Xuefeng Chen. This book was released on 2007. A Wideband Low-power Continuous-time Delta-Sigma Modulator for Next Generation Wireless Applications available in PDF, EPUB and Kindle. In this thesis, a wideband low-power CT DeltaSigma modulator for next generation wireless applications is proposed to achieve 10-bit dynamic range within a 25 MHz signal bandwidth. On the system level, a low-power, mainly feed-forward architecture is used to realize the loop filter. Feed-in branches are added and optimized to eliminate the out-of-band peaking in the signal transfer function. On the circuit level, two-stage operational amplifiers with class-AB output stages are used to implement low-power active RC integrators. Capacitor tuning is used to compensate the variation of RC time constants. In addition, a fast current adder, an 11-level internal flash ADC and three current feedback DACs are also integrated on the chip which was manufactured in TSMC 0.18 mum CMOS technology. The test results show that the modulator draws less than 10 mA from the 1.8 V supply voltage.
A Continuous-time Multi-stage Noise-shaping Delta-sigma Modulator for Next Generation Wireless Applications
A Continuous-time Multi-stage Noise-shaping Delta-sigma Modulator for Next Generation Wireless Applications - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook A Continuous-time Multi-stage Noise-shaping Delta-sigma Modulator for Next Generation Wireless Applications write by Do Yeon Yoon. This book was released on 2015. A Continuous-time Multi-stage Noise-shaping Delta-sigma Modulator for Next Generation Wireless Applications available in PDF, EPUB and Kindle. A continuous-time (CT) delta-sigma ([delta][sigma]) modulator for modern wireless communication applications is investigated in this thesis. Quantization noise is suppressed aggressively by increasing the effective order of the noise transfer function (NTF). In order to increase the effective order of the NTF, a 2-loop sturdy multi-stage noise-shaping (SMASH) architecture is utilized. The proposed CT SMASH architecture has a much wider signal bandwidth which was limited in the discrete-time (DT) SMASH architecture due to the inherent sampling frequency limitation of the DT implementation. Furthermore, the proposed CT SMASH architecture provides a better quantization noise suppression capability than the DT SMASH architecture by more completely canceling the quantization noise from the first loop. The CT SMASH architecture is implemented with several circuit techniques suitable for high operation speed. These circuit techniques allow the proposed CT [delta][sigma] modulator to achieve wide bandwidth, high resolution, and low power consumption for modern wireless communication applications. As a result, the prototype fabricated in 28nm CMOS achieves DR of 85dB, peak SNDR of 74.9dB, SFDR of 89.3dBc and Schreier FOM of 172.9dB over a 50MHz bandwidth at a 1.8GHz sampling frequency.
Continuous-Time Sigma-Delta A/D Conversion
Continuous-Time Sigma-Delta A/D Conversion - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook Continuous-Time Sigma-Delta A/D Conversion write by Friedel Gerfers. This book was released on 2006-02-27. Continuous-Time Sigma-Delta A/D Conversion available in PDF, EPUB and Kindle. Sigma-delta A/D converters are a key building block in wireless and multimedia applications. This comprehensive book deals with all relevant aspects arising during the analysis, design and simulation of the now widespread continuous-time implementations of sigma-delta modulators. The results of several years of research by the authors in the field of CT sigma-delta modulators are covered, including the analysis and modeling of different CT modulator architectures, CT/DT loop filter synthesis, a detailed error analysis of all components, and possible compensation/correction schemes for the non-ideal behavior in CT sigma-delta modulators. Guidance for obtaining low-power consumption and several practical implementations are also presented. It is shown that all the proposed new theories, architectures and possible correction techniques have been confirmed by measurements on discrete or integrated circuits. Quantitative results are also provided, thus enabling prediction of the resulting accuracy.
High-speed Delta-sigma Data Converters for Next-generation Wireless Communication
High-speed Delta-sigma Data Converters for Next-generation Wireless Communication - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook High-speed Delta-sigma Data Converters for Next-generation Wireless Communication write by Sakkarapani Balagopal. This book was released on 2014. High-speed Delta-sigma Data Converters for Next-generation Wireless Communication available in PDF, EPUB and Kindle. "In recent years, Continuous-time Delta-Sigma(CT-[delta][sigma]) analog-to-digital converters (ADCs) have been extensively investigated for their use in wireless receivers to achieve conversion bandwidths greater than 15 MHz and higher resolution of 10 to 14 bits. This dissertation investigates the current state-of-the-art high-speed single-bit and multi-bit Continuous-time Delta-Sigma modulator (CT-[delta][sigma]M) designs and their limitations due to circuit non-idealities in achieving the performance required for next-generation wireless standards. Also, we presented complete architectural and circuit details of a high-speed single-bit and multi-bit CT-[delta][sigma]M operating at a sampling rate of 1.25 GSps and 640 MSps respectively (the highest reported sampling rate in a 0.13 [mu]m CMOS technology node) with measurement results. Further, we propose novel hybrid [delta][sigma] architecture with two-step quantizer to alleviate the bandwidth and resolution bottlenecks associated with the contemporary CT-[delta][sigma]M topologies. To facilitate the design with the proposed architecture, a robust systematic design method is introduced to determine the loop-filter coefficients by taking into account the non-ideal integrator response, such as the finite opamp gain and the presence of multiple parasitic poles and zeros. Further, comprehensive system-level simulation is presented to analyze the effect of two-step quantizer non-idealities such as the offset and gain error in the sub-ADCs, and the current mismatch between the MSB and LSB elements in the feedback DAC. The proposed novel architecture is demonstrated by designing a high-speed wideband 4th order CT-[delta][sigma] modulator prototype, employing a two-step quantizer with 5-bits resolution. The proposed modulator takes advantage of the combination of a high-resolution two-step quantization technique and an excess-loop delay (ELD) compensation of more than one clock cycle to achieve lower-power consumption (28 mW), higher dynamic range (>69 dB) with a wide conversion bandwidth (20 MHz), even at a lower sampling rate of 400 MHz. The proposed modulator achieves a Figure of Merit (FoM) of 340 fJ/level."--Boise State University ScholarWorks.
Continuous-Time Delta-Sigma Modulators for High-Speed A/D Conversion
Continuous-Time Delta-Sigma Modulators for High-Speed A/D Conversion - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook Continuous-Time Delta-Sigma Modulators for High-Speed A/D Conversion write by James A. Cherry. This book was released on 2006-04-18. Continuous-Time Delta-Sigma Modulators for High-Speed A/D Conversion available in PDF, EPUB and Kindle. Among analog-to-digital converters, the delta-sigma modulator has cornered the market on high to very high resolution converters at moderate speeds, with typical applications such as digital audio and instrumentation. Interest has recently increased in delta-sigma circuits built with a continuous-time loop filter rather than the more common switched-capacitor approach. Continuous-time delta-sigma modulators offer less noisy virtual ground nodes at the input, inherent protection against signal aliasing, and the potential to use a physical rather than an electrical integrator in the first stage for novel applications like accelerometers and magnetic flux sensors. More significantly, they relax settling time restrictions so that modulator clock rates can be raised. This opens the possibility of wideband (1 MHz or more) converters, possibly for use in radio applications at an intermediate frequency so that one or more stages of mixing might be done in the digital domain. Continuous-Time Delta-Sigma Modulators for High-Speed A/D Conversion: Theory, Practice and Fundamental Performance Limits covers all aspects of continuous-time delta-sigma modulator design, with particular emphasis on design for high clock speeds. The authors explain the ideal design of such modulators in terms of the well-understood discrete-time modulator design problem and provide design examples in Matlab. They also cover commonly-encountered non-idealities in continuous-time modulators and how they degrade performance, plus a wealth of material on the main problems (feedback path delays, clock jitter, and quantizer metastability) in very high-speed designs and how to avoid them. They also give a concrete design procedure for a real high-speed circuit which illustrates the tradeoffs in the selection of key parameters. Detailed circuit diagrams, simulation results and test results for an integrated continuous-time 4 GHz band-pass modulator for A/D conversion of 1 GHz analog signals are also presented. Continuous-Time Delta-Sigma Modulators for High-Speed A/D Conversion: Theory, Practice and Fundamental Performance Limits concludes with some promising modulator architectures and a list of the challenges that remain in this exciting field.
