Circuit and Layout Techniques for Soft-error-resilient Digital CMOS Circuits

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Release : 2011
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Circuit and Layout Techniques for Soft-error-resilient Digital CMOS Circuits - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook Circuit and Layout Techniques for Soft-error-resilient Digital CMOS Circuits write by Hsiao-Heng Kelin Lee. This book was released on 2011. Circuit and Layout Techniques for Soft-error-resilient Digital CMOS Circuits available in PDF, EPUB and Kindle. Radiation-induced soft errors are a major concern for modern digital circuits, especially memory elements. Unlike large Random Access Memories that can be protected using error-correcting codes and bit interleaving, soft error protection of sequential elements, i.e. latches and flip-flops, is challenging. Traditional techniques for designing soft-error-resilient sequential elements generally address single node errors, or Single Event Upsets (SEUs). However, with technology scaling, the charge deposited by a single particle strike can be simultaneously collected and shared by multiple circuit nodes, resulting in Single Event Multiple Upsets (SEMUs). In this work, we target SEMUs by presenting a design framework for soft-error-resilient sequential cell design with an overview of existing circuit and layout techniques for soft error mitigation, and introducing a new soft error resilience layout design principle called LEAP, or Layout Design through Error-Aware Transistor Positioning. We then discuss our application of LEAP to the SEU-immune Dual Interlocked Storage Cell (DICE) by implementing a new sequential element layout called LEAP-DICE, retaining the original DICE circuit topology. We compare the soft error performance of SEU-immune flip-flops with the LEAP-DICE flip-flop using a test chip in 180nm CMOS under 200-MeV proton radiation and conclude that 1) our LEAP-DICE flip-flop encounters on average 2,000X and 5X fewer errors compared to a conventional D flip-flop and our reference DICE flip-flop, respectively; 2) our LEAP-DICE flip-flop has the best soft error performance among all existing SEU-immune flip-flops; 3) In the evaluation of our design framework, we also discovered new soft error effects related to operating conditions such as voltage scaling, clock frequency setting and radiation dose.

Circuit and Layout Techniques for Soft-error-resilient Digital CMOS Circuits

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Release : 2011
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Circuit and Layout Techniques for Soft-error-resilient Digital CMOS Circuits - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook Circuit and Layout Techniques for Soft-error-resilient Digital CMOS Circuits write by Hsiao-Heng Kelin Lee. This book was released on 2011. Circuit and Layout Techniques for Soft-error-resilient Digital CMOS Circuits available in PDF, EPUB and Kindle. Radiation-induced soft errors are a major concern for modern digital circuits, especially memory elements. Unlike large Random Access Memories that can be protected using error-correcting codes and bit interleaving, soft error protection of sequential elements, i.e. latches and flip-flops, is challenging. Traditional techniques for designing soft-error-resilient sequential elements generally address single node errors, or Single Event Upsets (SEUs). However, with technology scaling, the charge deposited by a single particle strike can be simultaneously collected and shared by multiple circuit nodes, resulting in Single Event Multiple Upsets (SEMUs). In this work, we target SEMUs by presenting a design framework for soft-error-resilient sequential cell design with an overview of existing circuit and layout techniques for soft error mitigation, and introducing a new soft error resilience layout design principle called LEAP, or Layout Design through Error-Aware Transistor Positioning. We then discuss our application of LEAP to the SEU-immune Dual Interlocked Storage Cell (DICE) by implementing a new sequential element layout called LEAP-DICE, retaining the original DICE circuit topology. We compare the soft error performance of SEU-immune flip-flops with the LEAP-DICE flip-flop using a test chip in 180nm CMOS under 200-MeV proton radiation and conclude that 1) our LEAP-DICE flip-flop encounters on average 2,000X and 5X fewer errors compared to a conventional D flip-flop and our reference DICE flip-flop, respectively; 2) our LEAP-DICE flip-flop has the best soft error performance among all existing SEU-immune flip-flops; 3) In the evaluation of our design framework, we also discovered new soft error effects related to operating conditions such as voltage scaling, clock frequency setting and radiation dose.

Digital CMOS Circuit Design

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Release : 2012-12-06
Genre : Technology & Engineering
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Book Rating : 855/5 ( reviews)

Digital CMOS Circuit Design - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook Digital CMOS Circuit Design write by Silvia Annaratone. This book was released on 2012-12-06. Digital CMOS Circuit Design available in PDF, EPUB and Kindle.

Theory of CMOS Digital Circuits and Circuit Failures

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Release : 2014-07-14
Genre : Mathematics
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Book Rating : 841/5 ( reviews)

Theory of CMOS Digital Circuits and Circuit Failures - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook Theory of CMOS Digital Circuits and Circuit Failures write by Masakazu Shoji. This book was released on 2014-07-14. Theory of CMOS Digital Circuits and Circuit Failures available in PDF, EPUB and Kindle. CMOS chips are becoming increasingly important in computer circuitry. They have been widely used during the past decade, and they will continue to grow in popularity in those application areas that demand high performance. Challenging the prevailing opinion that circuit simulation can reveal all problems in CMOS circuits, Masakazu Shoji maintains that simulation cannot completely remove the often costly errors that occur in circuit design. To address the failure modes of these circuits more fully, he presents a new approach to CMOS circuit design based on his systematizing of circuit design error and his unique theory of CMOS digital circuit operation. In analyzing CMOS digital circuits, the author focuses not on effects originating from the characteristics of the device (MOSFET) but on those arising from their connection. This emphasis allows him to formulate a powerful but ultimately simple theory explaining the effects of connectivity by using a concept of the states of the circuits, called microstates. Shoji introduces microstate sequence diagrams that describe the state changes (or the circuit connectivity changes), and he uses his microstate theory to analyze many of the conventional CMOS digital circuits. These analyses are practically all in closed-form, and they provide easy physical interpretation of the circuit's working mechanisms, the parametric dependence of performance, and the circuit's failure modes. Originally published in 1992. The Princeton Legacy Library uses the latest print-on-demand technology to again make available previously out-of-print books from the distinguished backlist of Princeton University Press. These editions preserve the original texts of these important books while presenting them in durable paperback and hardcover editions. The goal of the Princeton Legacy Library is to vastly increase access to the rich scholarly heritage found in the thousands of books published by Princeton University Press since its founding in 1905.

Soft Errors

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Release : 2017-12-19
Genre : Technology & Engineering
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Book Rating : 84X/5 ( reviews)

Soft Errors - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook Soft Errors write by Jean-Luc Autran. This book was released on 2017-12-19. Soft Errors available in PDF, EPUB and Kindle. Soft errors are a multifaceted issue at the crossroads of applied physics and engineering sciences. Soft errors are by nature multiscale and multiphysics problems that combine not only nuclear and semiconductor physics, material sciences, circuit design, and chip architecture and operation, but also cosmic-ray physics, natural radioactivity issues, particle detection, and related instrumentation. Soft Errors: From Particles to Circuits addresses the problem of soft errors in digital integrated circuits subjected to the terrestrial natural radiation environment—one of the most important primary limits for modern digital electronic reliability. Covering the fundamentals of soft errors as well as engineering considerations and technological aspects, this robust text: Discusses the basics of the natural radiation environment, particle interactions with matter, and soft-error mechanisms Details instrumentation developments in the fields of environment characterization, particle detection, and real-time and accelerated tests Describes the latest computational developments, modeling, and simulation strategies for the soft error-rate estimation in digital circuits Explores trends for future technological nodes and emerging devices Soft Errors: From Particles to Circuits presents the state of the art of this complex subject, providing comprehensive knowledge of the complete chain of the physics of soft errors. The book makes an ideal text for introductory graduate-level courses, offers academic researchers a specialized overview, and serves as a practical guide for semiconductor industry engineers or application engineers.