Efficient Use of Time Information in Analog-to-digital Converters - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook Efficient Use of Time Information in Analog-to-digital Converters write by Yue Hu. This book was released on 2014. Efficient Use of Time Information in Analog-to-digital Converters available in PDF, EPUB and Kindle. Time-domain data conversion has recently drawn increased research attention for its highly digital nature in favor of process technology scaling. Also, as the time information being carried by binary voltage, time-domain operation is much less sensitive to voltage noise compared to conventional voltage domain operation. However, for analog-to-digital converter (ADC) application, the challenge lies in the methodology of benefiting from time-domain operation while maintaining/improving the overall data conversion accuracy and power efficiency. This dissertation has a focus on the investigation of novel data conversion topologies based on classic voltage domain operation that is capable of generating time information, to improve ADC resolution, system stability and speed without power penalty. In the first approach, a novel continuous-time (CT) delta-sigma modulator (DSM) using a time-interleaved quantizer is proposed and implemented. Along with the doubled sample rate, the proposed architecture utilizes time information to perform correlated coupling between the two quantizer channels. A 120MS/s CT [delta sigma] ADC using proposed technique is implemented in 0.18 [micro]m CMOS process. The measurement results achieve second order noise coupling from the interleaved quantizer itself without extra phases. More importantly, excess loop delay of two full sample clocks is compensated by time-domain signal coupling; the resulted CT DSM is fully stabilized in 120MHz sampling rate and achieves 11 effective number of bits (ENOB). In the second approach, a new category of pulse-width-modulation (PWM) scheme is proposed and described: time symmetric PWM (TSPWM). An ADC structure is further proposed and implemented utilizing this novel voltage-to-time converter, followed by a first order noise-shaped switched-ring-oscillator (SRO) TDC quantizer. This ADC topology takes advantage of the TDC speed scaling for its digitized operation to boost the overall ADC resolution and signal bandwidth, while the voltage-to-time front-end is able to remain at a much lower speed than the TDC, thanks to the proposed technique. This is the first work that decouples the PWM modulation rate from TDC quantizing speed without distortion penalty. Built in 0.18 [micro]m, the implemented ADC is able to sample at a range from 20MHz to 40MHz, the generated pulse train is quantized by the following SRO TDC at a rate of 400MHz. The prototype chip shows a SFDR improvement over 24dB on the ADC output when TSPWM is used.
Time-interleaved Analog-to-Digital Converters
Time-interleaved Analog-to-Digital Converters - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook Time-interleaved Analog-to-Digital Converters write by Simon Louwsma. This book was released on 2010-09-08. Time-interleaved Analog-to-Digital Converters available in PDF, EPUB and Kindle. Time-interleaved Analog-to-Digital Converters describes the research performed on low-power time-interleaved ADCs. A detailed theoretical analysis is made of the time-interleaved Track & Hold, since it must be capable of handling signals in the GHz range with little distortion, and minimal power consumption. Timing calibration is not attractive, therefore design techniques are presented which do not require timing calibration. The design of power efficient sub-ADCs is addressed with a theoretical analysis of a successive approximation converter and a pipeline converter. It turns out that the first can consume about 10 times less power than the latter, and this conclusion is supported by literature. Time-interleaved Analog-to-Digital Converters describes the design of a high performance time-interleaved ADC, with much attention for practical design aspects, aiming at both industry and research. Measurements show best-inclass performance with a sample-rate of 1.8 GS/s, 7.9 ENOBs and a power efficiency of 1 pJ/conversion-step.
Time and Statistical Information Utilization in High Efficiency Sub-micron CMOS Successive Approximation Analog to Digital Converters
Time and Statistical Information Utilization in High Efficiency Sub-micron CMOS Successive Approximation Analog to Digital Converters - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook Time and Statistical Information Utilization in High Efficiency Sub-micron CMOS Successive Approximation Analog to Digital Converters write by Jon Guerber. This book was released on 2013. Time and Statistical Information Utilization in High Efficiency Sub-micron CMOS Successive Approximation Analog to Digital Converters available in PDF, EPUB and Kindle. In an industrial and consumer electronic marketplace that is increasingly demanding greater real-world interactivity in portable and distributed devices, analog to digital converter efficiency and performance is being carefully examined. The successive approximation (SAR) analog to digital converter (ADC) architecture has become popular for its high efficiency at mid-speed and resolution requirements. This is due to the one core single bit quantizer, lack of residue amplification, and large digital domain processing allowing for easy process scaling. This work examines the traditional binary capacitive SAR ADC time and statistical information and proposes new structures that optimize ADC performance. The Ternary SAR (TSAR) uses the quantizer delay information to enhance accuracy, speed and power consumption of the overall SAR while providing multi-level redundancy. The early reset merged capacitor switching SAR (EMCS) identifies lost information in the SAR subtraction and optimizes a full binary quanitzer structure for a Ternary MCS DAC. Residue Shaping is demonstrated in SAR and pipeline configurations to allow for an extra bit of signal to noise quantization ratio (SQNR) due to multi-level redundancy. The feedback initialized ternary SAR (FITSAR) is proposed which splits a TSAR into separate binary and ternary sub-ADC structures for speed and power benefits with an inter-stage encoding that not only maintains residue shaping across the binary SAR, but allows for nearly optimally minimal energy consumption for capacitive ternary DACs. Finally, the ternary SAR ideas are applied to R2R DACs to reduce power consumption. These ideas are tested both in simulation and with prototype results.
Design of Power-Efficient Highly Digital Analog-to-Digital Converters for Next-Generation Wireless Communication Systems
Design of Power-Efficient Highly Digital Analog-to-Digital Converters for Next-Generation Wireless Communication Systems - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook Design of Power-Efficient Highly Digital Analog-to-Digital Converters for Next-Generation Wireless Communication Systems write by Xinpeng Xing. This book was released on 2017-10-04. Design of Power-Efficient Highly Digital Analog-to-Digital Converters for Next-Generation Wireless Communication Systems available in PDF, EPUB and Kindle. This book discusses both architecture- and circuit-level design aspects of voltage-controlled-oscillator (VCO)-based analog-to-digital converters (ADCs), especially focusing on mitigation of VCO nonlinearity and the improvement of power efficiency. It shows readers how to develop power-efficient complementary-metal-oxide-semiconductor (CMOS) ADCs for applications such as LTE, 802.11n, and VDSL2+. The material covered can also be applied to other specifications and technologies. Design of Power-Efficient Highly Digital Analog-to-Digital Converters for Next-Generation Wireless Communication Systems begins with a general introduction to the applications of an ADC in communications systems and the basic concepts of VCO-based ADCs. The text addresses a wide range of converter architectures including open- and closed-loop technologies. Special attention is paid to the replacement of power-hungry analog blocks with VCO-based circuits and to the mitigation of VCO nonline arity. Various MATLAB®/Simulink® models are provided for important circuit nonidealities, allowing designers and researchers to determine the required specifications for the different building blocks that form the systematic integrated-circuit design procedure. Five different VCO-based ADC design examples are presented, introducing innovations at both architecture and circuit levels. Of these designs, the best power efficiency of a high-bandwidth oversampling ADC is achieved in a 40 nm CMOS demonstration. This book is essential reading material for engineers and researchers working on low-power-analog and mixed-signal design and may be used by instructors teaching advanced courses on the subject. It provides a clear overview and comparison of VCO-based ADC architectures and gives the reader insight into the most important circuit imperfections.
Data Converters
Data Converters - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook Data Converters write by Franco Maloberti. This book was released on 2007-02-22. Data Converters available in PDF, EPUB and Kindle. This book is the first graduate-level textbook presenting a comprehensive treatment of Data Converters. The advancement of digital electronics urged the availability of a still missing support for teaching and self-learning analog-digital interfaces at many levels: the specification, the conversion methods and architectures, the circuit design and the testing. This book, after the necessary study of the background theoretical elements, covers aspects and provide elements for a deep and comprehensive knowledge. The breath and the level of details of topics is enhanced by introductory material in each chapter and the use of many examples, most of them in the form of computer behavioral simulations. The examples and the end-of-chapter problems help in understanding and favor self-practice using tools that are effective for training and for design activity. Data Converters is a textbook that is also essential for engineering professionals as it was written for responding to a shortage of organically organized material on the topic. The book assumes a solid background in analog and digital circuits as well as a working knowledge of simulation tools for circuit and behavioral analysis. A background on statistical analysis is also helpful, though not strictly necessary. Coverage of all the basic elements essential for a clear understanding of sampling, quantization, noise in sampled-data systems and mathematical tools for sampled-data linear systems Comprehensive definition of the parameters used to specify data converters and necessary for understanding product data sheets Coverage of all the architectures used in Nyquist-rate data converters and detailed study of features, limits and design techniques Detailed study of oversampled and Sigma-Delta converters with simulation examples and use of spectra and histograms for a clear understanding of features and limit if the noise shaping Coverage of digital correction and calibration techniques for enhancing performances Use of theory and intuitive views to explain circuits and systems operation and limits Coverage of testing methods and description of the data processing used for testing and characterization Extensive use of Simulink and Matlab in examples and problem sets to assist reader comprehension and favor deeper study
