Low-Power High-Resolution Analog to Digital Converters - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook Low-Power High-Resolution Analog to Digital Converters write by Amir Zjajo. This book was released on 2010-10-29. Low-Power High-Resolution Analog to Digital Converters available in PDF, EPUB and Kindle. With the fast advancement of CMOS fabrication technology, more and more signal-processing functions are implemented in the digital domain for a lower cost, lower power consumption, higher yield, and higher re-configurability. This has recently generated a great demand for low-power, low-voltage A/D converters that can be realized in a mainstream deep-submicron CMOS technology. However, the discrepancies between lithography wavelengths and circuit feature sizes are increasing. Lower power supply voltages significantly reduce noise margins and increase variations in process, device and design parameters. Consequently, it is steadily more difficult to control the fabrication process precisely enough to maintain uniformity. The inherent randomness of materials used in fabrication at nanoscopic scales means that performance will be increasingly variable, not only from die-to-die but also within each individual die. Parametric variability will be compounded by degradation in nanoscale integrated circuits resulting in instability of parameters over time, eventually leading to the development of faults. Process variation cannot be solved by improving manufacturing tolerances; variability must be reduced by new device technology or managed by design in order for scaling to continue. Similarly, within-die performance variation also imposes new challenges for test methods. In an attempt to address these issues, Low-Power High-Resolution Analog-to-Digital Converters specifically focus on: i) improving the power efficiency for the high-speed, and low spurious spectral A/D conversion performance by exploring the potential of low-voltage analog design and calibration techniques, respectively, and ii) development of circuit techniques and algorithms to enhance testing and debugging potential to detect errors dynamically, to isolate and confine faults, and to recover errors continuously. The feasibility of the described methods has been verified by measurements from the silicon prototypes fabricated in standard 180nm, 90nm and 65nm CMOS technology.
High-Resolution and High-Speed Integrated CMOS AD Converters for Low-Power Applications
High-Resolution and High-Speed Integrated CMOS AD Converters for Low-Power Applications - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook High-Resolution and High-Speed Integrated CMOS AD Converters for Low-Power Applications write by Weitao Li. This book was released on 2017-08-01. High-Resolution and High-Speed Integrated CMOS AD Converters for Low-Power Applications available in PDF, EPUB and Kindle. This book is a step-by-step tutorial on how to design a low-power, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) integrated CMOS analog-to-digital (AD) converter, to respond to the challenge from the rapid growth of IoT. The discussion includes design techniques on both the system level and the circuit block level. In the architecture level, the power-efficient pipelined AD converter, the hybrid AD converter and the time-interleaved AD converter are described. In the circuit block level, the reference voltage buffer, the opamp, the comparator, and the calibration are presented. Readers designing low-power and high-performance AD converters won’t want to miss this invaluable reference. Provides an in-depth introduction to the newest design techniques for the power-efficient, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) AD converter; Presents three types of power-efficient architectures of the high-resolution and high-speed AD converter; Discusses the relevant circuit blocks (i.e., the reference voltage buffer, the opamp, and the comparator) in two aspects, relaxing the requirements and improving the performance.
Time-to-Digital Converters
Time-to-Digital Converters - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook Time-to-Digital Converters write by Stephan Henzler. This book was released on 2010-03-10. Time-to-Digital Converters available in PDF, EPUB and Kindle. Micro-electronics and so integrated circuit design are heavily driven by technology scaling. The main engine of scaling is an increased system performance at reduced manufacturing cost (per system). In most systems digital circuits dominate with respect to die area and functional complexity. Digital building blocks take full - vantage of reduced device geometries in terms of area, power per functionality, and switching speed. On the other hand, analog circuits rely not on the fast transition speed between a few discrete states but fairly on the actual shape of the trans- tor characteristic. Technology scaling continuously degrades these characteristics with respect to analog performance parameters like output resistance or intrinsic gain. Below the 100 nm technology node the design of analog and mixed-signal circuits becomes perceptibly more dif cult. This is particularly true for low supply voltages near to 1V or below. The result is not only an increased design effort but also a growing power consumption. The area shrinks considerably less than p- dicted by the digital scaling factor. Obviously, both effects are contradictory to the original goal of scaling. However, digital circuits become faster, smaller, and less power hungry. The fast switching transitions reduce the susceptibility to noise, e. g. icker noise in the transistors. There are also a few drawbacks like the generation of power supply noise or the lack of power supply rejection.
Power-efficient Two-step Pipelined Analog-to-digital Conversion
Power-efficient Two-step Pipelined Analog-to-digital Conversion - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook Power-efficient Two-step Pipelined Analog-to-digital Conversion write by Ho-Young Lee. This book was released on 2011. Power-efficient Two-step Pipelined Analog-to-digital Conversion available in PDF, EPUB and Kindle. Hand-held devices are among the most successful consumer electronics in modern society. Behind these successful devices, lies a key analog design technique that involves high-performance analog-to-digital conversion combined with very low power consumption. This dissertation presents two different approaches to achieving high power efficiency from a two-step pipelined architecture, which is generally known as one of the most power-consuming analog-to-digital converters. In the first approach, an analog feedback loop of a residue amplifier in a two-step pipelined analog-to-digital converter is reconfigured digitally using a single comparator and an R-2R digital-to-analog converter. This comparator-based structure can reduce power consumption of a conventional two-step pipelined analog-to-digital converter which consists of an opamp-based residue amplifier followed by a second- stage analog-to-digital converter. In addition, this dissertation includes circuit design techniques that provide a digital offset correction for the comparator-based two-step structure, binary-weighted switching for an R-2R digital-to-analog converter, and reference trimming for a flash analog-to-digital converter. A 10-b prototype analog-to-digital converter achieves an FOM of 121 fJ/conversion-step under 0.7-V supply. The second approach provides a way to achieve low power consumption for a high-resolution two-step pipelined analog-to-digital converter. An opamp is designed to consume optimized static power using a quarter-scaled residue gain together with minimized loading capacitance from the proposed second stage. A 14-b prototype analog-to-digital converter achieves an FOM of 31.3 fJ/conversion-step with an ENOB of 11.4 b, which is the lowest FOM in high-resolution analog-to-digital converters having greater than an ENOB of 10 b. Finally, the potential for further power reduction in a two-step pipelined analog-to-digital converter is discussed as a topic for future research.
Modular Low-Power, High-Speed CMOS Analog-to-Digital Converter of Embedded Systems
Modular Low-Power, High-Speed CMOS Analog-to-Digital Converter of Embedded Systems - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook Modular Low-Power, High-Speed CMOS Analog-to-Digital Converter of Embedded Systems write by Keh-La Lin. This book was released on 2006-01-14. Modular Low-Power, High-Speed CMOS Analog-to-Digital Converter of Embedded Systems available in PDF, EPUB and Kindle. One of the main trends of microelectronics is toward design for integrated systems, i.e., system-on-a-chip (SoC) or system-on-silicon (SoS). Due to this development, design techniques for mixed-signal circuits become more important than before. Among other devices, analog-to-digital and digital-to-analog converters are the two bridges between the analog and the digital worlds. Besides, low-power design technique is one of the main issues for embedded systems, especially for hand-held applications. Modular Low-Power, High-Speed CMOS Analog-to-Digital Converter for Embedded Systems aims at design techniques for low-power, high-speed analog-to-digital converter processed by the standard CMOS technology. Additionally this book covers physical integration issues of A/D converter integrated in SoC, i.e., substrate crosstalk and reference voltage network design.
