Mitigating Process Variability and Soft Errors at Circuit-Level for FinFETs - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook Mitigating Process Variability and Soft Errors at Circuit-Level for FinFETs write by Alexandra Zimpeck. This book was released on 2021-03-10. Mitigating Process Variability and Soft Errors at Circuit-Level for FinFETs available in PDF, EPUB and Kindle. This book evaluates the influence of process variations (e.g. work-function fluctuations) and radiation-induced soft errors in a set of logic cells using FinFET technology, considering the 7nm technological node as a case study. Moreover, for accurate soft error estimation, the authors adopt a radiation event generator tool (MUSCA SEP3), which deals both with layout features and electrical properties of devices. The authors also explore four circuit-level techniques (e.g. transistor reordering, decoupling cells, Schmitt Trigger, and sleep transistor) as alternatives to attenuate the unwanted effects on FinFET logic cells. This book also evaluates the mitigation tendency when different levels of process variation, transistor sizing, and radiation particle characteristics are applied in the design. An overall comparison of all methods addressed by this work is provided allowing to trace a trade-off between the reliability gains and the design penalties of each approach regarding the area, performance, power consumption, single event transient (SET) pulse width, and SET cross-section.
Soft Errors
Soft Errors - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook Soft Errors write by Jean-Luc Autran. This book was released on 2017-12-19. Soft Errors available in PDF, EPUB and Kindle. Soft errors are a multifaceted issue at the crossroads of applied physics and engineering sciences. Soft errors are by nature multiscale and multiphysics problems that combine not only nuclear and semiconductor physics, material sciences, circuit design, and chip architecture and operation, but also cosmic-ray physics, natural radioactivity issues, particle detection, and related instrumentation. Soft Errors: From Particles to Circuits addresses the problem of soft errors in digital integrated circuits subjected to the terrestrial natural radiation environment—one of the most important primary limits for modern digital electronic reliability. Covering the fundamentals of soft errors as well as engineering considerations and technological aspects, this robust text: Discusses the basics of the natural radiation environment, particle interactions with matter, and soft-error mechanisms Details instrumentation developments in the fields of environment characterization, particle detection, and real-time and accelerated tests Describes the latest computational developments, modeling, and simulation strategies for the soft error-rate estimation in digital circuits Explores trends for future technological nodes and emerging devices Soft Errors: From Particles to Circuits presents the state of the art of this complex subject, providing comprehensive knowledge of the complete chain of the physics of soft errors. The book makes an ideal text for introductory graduate-level courses, offers academic researchers a specialized overview, and serves as a practical guide for semiconductor industry engineers or application engineers.
Circuit-level Approaches to Mitigate the Process Variability and Soft Errors in FinFET Logic Cells
Circuit-level Approaches to Mitigate the Process Variability and Soft Errors in FinFET Logic Cells - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook Circuit-level Approaches to Mitigate the Process Variability and Soft Errors in FinFET Logic Cells write by Alexandra Lackmann-Zimpeck. This book was released on 2019. Circuit-level Approaches to Mitigate the Process Variability and Soft Errors in FinFET Logic Cells available in PDF, EPUB and Kindle. Process variability mitigation and radiation hardness are relevant reliability requirements as chip manufacturing advances more in-depth into the nanometer regime. The parameter yield loss and critical failures on system behavior are the major consequences of these issues. Some related works explore the influence of process variability and single event transients (SET) on the circuits based on FinFET technologies, but there is a lack of approaches to mitigate them. For these reasons, from a design standpoint, considerable efforts should be made to understand and reduce the impacts introduced by reliability challenges. In this regard, the main contributions of this PhD thesis are to: 1) investigate the behavior of FinFET logic cells under process variations and radiation effects; 2) evaluate four circuit-level approaches to attenuate the impact caused by work-function fluctuations (WFF) and soft errors (SE); 3) provide an overall comparison between all techniques applied in this work; 4) trace a trade-off between the gains and penalties of each approach regarding performance, power, area, SET cross-section, and SET pulse width. Transistor reordering, decoupling cells, Schmitt Triggers, and sleep transistors are the four circuit-level mitigation techniques explored in this work. The potential of each one to make the logic cells more robust to the process variability and radiation-induced soft errors are assessed comparing the standard version results with the design using each approach. This PhD thesis also establishes the mitigation tendency when different levels of variation, transistor sizing, and radiation particles characteristics such as linear energy transfer (LET) are applied in the design with these techniques.The process variability is evaluated through Monte Carlo (MC) simulations with the WFF modeled as a Gaussian function using SPICE simulation while the SE susceptibility is estimated using the radiation event generator tool MUSCA SEP3 (developed at ONERA) also based on a MC method that deals both with radiation environment characteristics, layout features and the electrical properties of devices. In general, the proposed approaches improve the state-of-the-art by providing circuit-level options to reduce the process variability effects and SE susceptibility, at fewer penalties and design complexity. The transistor reordering technique can increase the robustness of logic cells under process variations up to 8%, but this method is not favorable for SE mitigation. The insertion of decoupling cells shows interesting outcomes for power variability control with levels of variation above 4%, and it can attenuate until 10% the delay variability considering manufacturing process with 3% of WFF. Depending on the LET, the design with decoupling cells can decrease until 10% of SE susceptibility of logic cells. The use of Schmitt Triggers in the output of FinFET cells can improve the variability sensitivity by up to 50%. The sleep transistor approach improves the power variability reaching around 12% for WFF of 5%, but the advantages of this method to delay variability depends how the transistors are arranged with the sleep transistor in the pull-down network. The addition of a sleep transistor become all logic cells studied free of faults even at the near-threshold regime. In this way, the best approach to mitigate the process variability is the use of Schmitt Triggers, as well as the sleep transistor technique is the most efficient for the SE mitigation. However, the Schmitt Trigger technique presents the highest penalties in area, performance, and power. Therefore, depending on the application, the sleep transistor technique can be the most appropriate to mitigate the process variability effects.
Soft Errors in Modern Electronic Systems
Soft Errors in Modern Electronic Systems - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook Soft Errors in Modern Electronic Systems write by Michael Nicolaidis. This book was released on 2010-09-24. Soft Errors in Modern Electronic Systems available in PDF, EPUB and Kindle. This book provides a comprehensive presentation of the most advanced research results and technological developments enabling understanding, qualifying and mitigating the soft errors effect in advanced electronics, including the fundamental physical mechanisms of radiation induced soft errors, the various steps that lead to a system failure, the modelling and simulation of soft error at various levels (including physical, electrical, netlist, event driven, RTL, and system level modelling and simulation), hardware fault injection, accelerated radiation testing and natural environment testing, soft error oriented test structures, process-level, device-level, cell-level, circuit-level, architectural-level, software level and system level soft error mitigation techniques. The book contains a comprehensive presentation of most recent advances on understanding, qualifying and mitigating the soft error effect in advanced electronic systems, presented by academia and industry experts in reliability, fault tolerance, EDA, processor, SoC and system design, and in particular, experts from industries that have faced the soft error impact in terms of product reliability and related business issues and were in the forefront of the countermeasures taken by these companies at multiple levels in order to mitigate the soft error effects at a cost acceptable for commercial products. In a fast moving field, where the impact on ground level electronics is very recent and its severity is steadily increasing at each new process node, impacting one after another various industry sectors (as an example, the Automotive Electronics Council comes to publish qualification requirements on soft errors), research and technology developments and industrial practices have evolve very fast, outdating the most recent books edited at 2004.
Soft Error Analysis and Mitigation in Circuits Involving C-elements
Soft Error Analysis and Mitigation in Circuits Involving C-elements - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook Soft Error Analysis and Mitigation in Circuits Involving C-elements write by Norhuzaimin Bin Julai. This book was released on 2015. Soft Error Analysis and Mitigation in Circuits Involving C-elements available in PDF, EPUB and Kindle. A SEU or soft error is defined as a temporary error on digital electronics due to the effect of radiation. Such an error can cause system failure, e.g. a deadlock in an asynchronous system or production of incorrect outputs due to data corruption. The first part of this thesis studies the impact of process variation, temperature, voltage and size scaling within the same process on the vulnerability of the nodes of C-element circuits. The objectives are to identify vulnerable to SEU nodes inside a C-element and to find the critical charge needed to flip the output from low to high (0-1) and high to low (1-0) on different implementations of C-elements. In the second part, a framework to compute the SEU error rates is developed. The error rates of circuits are a trade-off between the size of the transistors and the total area of vulnerability. Comparisons of the vulnerability of different configurations of a C-element are made, and error rates are calculated. The third part focuses on soft error mitigation for single and dual rail latches. The latches are able to detect and correct errors due to SEU. The functionalities of the solutions have been validated by simulation. A comprehensive analysis of the performance of the latches under variations of the process and temperature are presented. The fourth part focuses on testing of the new latches. The objective is to design complex systems and incorporate both single rail and dual rail latches in the systems. Errors are injected in the latches and the functionality of the error correcting latches towards the SEU errors are observed at their outputs. The framework to compute error rates and soft error mitigation developed in this thesis can be used by designers in predicting the occurrence of soft error and mitigating soft error in systems.
