On-chip Testing of Very Large Scale Integrated Circuits - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook On-chip Testing of Very Large Scale Integrated Circuits write by P. Varma. This book was released on 1984. On-chip Testing of Very Large Scale Integrated Circuits available in PDF, EPUB and Kindle.
Large Scale Integration Digital Testing
Large Scale Integration Digital Testing - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook Large Scale Integration Digital Testing write by T. F. Leedy. This book was released on 1979. Large Scale Integration Digital Testing available in PDF, EPUB and Kindle.
Third Caltech Conference on Very Large Scale Integration
Third Caltech Conference on Very Large Scale Integration - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook Third Caltech Conference on Very Large Scale Integration write by R. Bryant. This book was released on 2012-12-06. Third Caltech Conference on Very Large Scale Integration available in PDF, EPUB and Kindle. The papers in this book were presented at the Third Caltech Conference on Very Large Scale Integration, held March 21-23, 1983 in Pasadena, California. The conference was organized by the Computer Science Depart ment, California Institute of Technology, and was partly supported by the Caltech Silicon Structures Project. This conference focused on the role of systematic methodologies, theoretical models, and algorithms in all phases of the design, verification, and testing of very large scale integrated circuits. The need for such disciplines has arisen as a result of the rapid progress of integrated circuit technology over the past 10 years. This progress has been driven largely by the fabrica tion technology, providing the capability to manufacture very complex elec tronic systems reliably and at low cost. At this point the capability to manufac ture very large scale integrated circuits has exceeded our capability to develop new product designs quickly, reliably, and at a reasonable cost. As a result new designs are undertaken only if the production volume will be large enough to amortize high design costs, products first appear on the market well past their announced delivery date, and reference manuals must be amended to document design flaws. Recent research in universities and in private industry has created an emerg ing science of very large scale integration.
Thermal Issues in Testing of Advanced Systems on Chip
Thermal Issues in Testing of Advanced Systems on Chip - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook Thermal Issues in Testing of Advanced Systems on Chip write by Nima Aghaee Ghaleshahi. This book was released on 2015-09-23. Thermal Issues in Testing of Advanced Systems on Chip available in PDF, EPUB and Kindle. Many cutting-edge computer and electronic products are powered by advanced Systems-on-Chip (SoC). Advanced SoCs encompass superb performance together with large number of functions. This is achieved by efficient integration of huge number of transistors. Such very large scale integration is enabled by a core-based design paradigm as well as deep-submicron and 3D-stacked-IC technologies. These technologies are susceptible to reliability and testing complications caused by thermal issues. Three crucial thermal issues related to temperature variations, temperature gradients, and temperature cycling are addressed in this thesis. Existing test scheduling techniques rely on temperature simulations to generate schedules that meet thermal constraints such as overheating prevention. The difference between the simulated temperatures and the actual temperatures is called temperature error. This error, for past technologies, is negligible. However, advanced SoCs experience large errors due to large process variations. Such large errors have costly consequences, such as overheating, and must be taken care of. This thesis presents an adaptive approach to generate test schedules that handle such temperature errors. Advanced SoCs manufactured as 3D stacked ICs experience large temperature gradients. Temperature gradients accelerate certain early-life defect mechanisms. These mechanisms can be artificially accelerated using gradient-based, burn-in like, operations so that the defects are detected before shipping. Moreover, temperature gradients exacerbate some delay-related defects. In order to detect such defects, testing must be performed when appropriate temperature-gradients are enforced. A schedule-based technique that enforces the temperature-gradients for burn-in like operations is proposed in this thesis. This technique is further developed to support testing for delay-related defects while appropriate gradients are enforced. The last thermal issue addressed by this thesis is related to temperature cycling. Temperature cycling test procedures are usually applied to safety-critical applications to detect cycling-related early-life failures. Such failures affect advanced SoCs, particularly through-silicon-via structures in 3D-stacked-ICs. An efficient schedule-based cycling-test technique that combines cycling acceleration with testing is proposed in this thesis. The proposed technique fits into existing 3D testing procedures and does not require temperature chambers. Therefore, the overall cycling acceleration and testing cost can be drastically reduced. All the proposed techniques have been implemented and evaluated with extensive experiments based on ITC’02 benchmarks as well as a number of 3D stacked ICs. Experiments show that the proposed techniques work effectively and reduce the costs, in particular the costs related to addressing thermal issues and early-life failures. We have also developed a fast temperature simulation technique based on a closed-form solution for the temperature equations. Experiments demonstrate that the proposed simulation technique reduces the schedule generation time by more than half.
System Integration
System Integration - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook System Integration write by Kurt Hoffmann. This book was released on 2006-02-08. System Integration available in PDF, EPUB and Kindle. The development of large-scale integrated systems on a chip has had a dramatic effect on circuit design methodology. Recent years have seen an escalation of interest in systems level integration (system-on-a-chip) and the development of low power, high chip density circuits and systems. Kurt Hoffmann sets out to address a wide range of issues relating to the design and integration of integrated circuit components and provides readers with the methodology by which simple equations for the estimation of transistor geometries and circuit behaviour can be deduced. The broad coverage of this unique book ranges from field effect transistor design, MOS transistor modelling and the fundamentals of digital CMOS circuit design through to MOS memory architecture and design. Highlights the increasing requirement for information on system-on-a-chip design and integration. Combines coverage of semiconductor physics, digital VLSI design and analog integrated circuits in one volume for the first time. Written with the aim of bridging the gap between semiconductor device physics and practical circuit design. Introduces the basic behaviour of semiconductor components for ICs and covers the design of both digital and analog circuits in CMOS and BiCMOS technologies. Broad coverage will appeal to both students and practising engineers alike. Written by a respected expert in the field with a proven track record of publications in this field. Drawing upon considerable experience within both industry and academia, Hoffmann’s outstanding text, will prove an invaluable resource for designers, practising engineers in the semiconductor device field and electronics systems industry as well as Postgraduate students of microelectronics, electrical and computer engineering.
