Author : Henrique Fingler
Release : 2023
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Improving Emerging Systems' Efficiency with Hardware Accelerators - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook Improving Emerging Systems' Efficiency with Hardware Accelerators write by Henrique Fingler. This book was released on 2023. Improving Emerging Systems' Efficiency with Hardware Accelerators available in PDF, EPUB and Kindle. The constant growth of datacenters and cloud computing comes with an increase of power consumption. With the end of Dennard scaling and Moore's law, computing no longer grows at the same ratio as transistor count and density grows. This thesis explores ideas to increase computing efficiency, which is defined as the ratio of processing power per energy spent. Hardware acceleration is an established technique to improve computing efficiency by specializing hardware to a subset of operations or application domains. While accelerators have fueled the success of some application domains such as machine learning, accelerator programming interfaces and runtimes have significant limitations that collectively form barriers to adoption in many settings. There are great opportunities for extending hardware acceleration interfaces to more application domains and other platforms. First, this thesis presents DGSF, a framework that enables serverless platforms to access disaggregated accelerators (GPUs). DGSF uses virtualization techniques to provide serverless platforms with GPUs, with the abstraction of a local GPU that can be backed by a local or a remote physical GPU. Through optimizations specific to serverless platforms, applications that use a GPU can have a lower end-to-end execution time than if they were run natively, using a local physical GPU. DGSF extends hardware acceleration accessibility to an existing serverless platforms which currently does not support accelerators, showing the flexibility and ease of deployment of the DGSF framework. Next, this thesis presents LAKE, a framework that introduces accelerator and machine learning support to operating system kernels. I believe there is great potential to replace operating system resource management heuristics with machine learning, for example, I/O and process scheduling. Accelerators are vital to support efficient, low latency inference for kernels that makes frequent use of ML techniques. Unfortunately, operating systems can not access hardware acceleration. LAKE uses GPU virtualization techniques to efficiently enable accelerator accessibility in operating systems. However, allowing operating systems to use hardware acceleration introduces problems unique to this scenario. User and kernel applications can contend for resources such as CPU or accelerators. Unmanaged resource contention can harm the performance of applications. Machine learning-based kernel subsystems can produce unsatisfactory results. There need to be guardrails, mechanisms that prevent machine learning models to output solutions with quality below a threshold, to avoid poor decisions and performance pathologies. LAKE proposes customizable, developer written policies that can control contention, modulate execution and provide guardrails to machine learning. Finally, this thesis proposes LFR, a feature registry that augments LAKE to provide a shared feature and model registry framework to support future ML-in-the-kernel applications, removing the need of ad hoc designs. The learnings from LAKE showed that machine learning in operating systems can increase computing efficiency and revealed the absence of a shared framework. Such framework is a required component in future research and production of machine learning driven operating systems. LFR introduces an in-kernel feature registry that provides machine learning-based kernel subsystems with a common API to store, capture and manage models and feature vectors, and facilitates the insertion of inference hooks into the kernel. This thesis studies the application of LFR, and evaluates the performance critical parts, such as capturing and storing features