Soft Error Analysis and Mitigation in Circuits Involving C-elements - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook Soft Error Analysis and Mitigation in Circuits Involving C-elements write by Norhuzaimin Bin Julai. This book was released on 2015. Soft Error Analysis and Mitigation in Circuits Involving C-elements available in PDF, EPUB and Kindle. A SEU or soft error is defined as a temporary error on digital electronics due to the effect of radiation. Such an error can cause system failure, e.g. a deadlock in an asynchronous system or production of incorrect outputs due to data corruption. The first part of this thesis studies the impact of process variation, temperature, voltage and size scaling within the same process on the vulnerability of the nodes of C-element circuits. The objectives are to identify vulnerable to SEU nodes inside a C-element and to find the critical charge needed to flip the output from low to high (0-1) and high to low (1-0) on different implementations of C-elements. In the second part, a framework to compute the SEU error rates is developed. The error rates of circuits are a trade-off between the size of the transistors and the total area of vulnerability. Comparisons of the vulnerability of different configurations of a C-element are made, and error rates are calculated. The third part focuses on soft error mitigation for single and dual rail latches. The latches are able to detect and correct errors due to SEU. The functionalities of the solutions have been validated by simulation. A comprehensive analysis of the performance of the latches under variations of the process and temperature are presented. The fourth part focuses on testing of the new latches. The objective is to design complex systems and incorporate both single rail and dual rail latches in the systems. Errors are injected in the latches and the functionality of the error correcting latches towards the SEU errors are observed at their outputs. The framework to compute error rates and soft error mitigation developed in this thesis can be used by designers in predicting the occurrence of soft error and mitigating soft error in systems.
Soft Errors in Modern Electronic Systems
Soft Errors in Modern Electronic Systems - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook Soft Errors in Modern Electronic Systems write by Michael Nicolaidis. This book was released on 2010-09-24. Soft Errors in Modern Electronic Systems available in PDF, EPUB and Kindle. This book provides a comprehensive presentation of the most advanced research results and technological developments enabling understanding, qualifying and mitigating the soft errors effect in advanced electronics, including the fundamental physical mechanisms of radiation induced soft errors, the various steps that lead to a system failure, the modelling and simulation of soft error at various levels (including physical, electrical, netlist, event driven, RTL, and system level modelling and simulation), hardware fault injection, accelerated radiation testing and natural environment testing, soft error oriented test structures, process-level, device-level, cell-level, circuit-level, architectural-level, software level and system level soft error mitigation techniques. The book contains a comprehensive presentation of most recent advances on understanding, qualifying and mitigating the soft error effect in advanced electronic systems, presented by academia and industry experts in reliability, fault tolerance, EDA, processor, SoC and system design, and in particular, experts from industries that have faced the soft error impact in terms of product reliability and related business issues and were in the forefront of the countermeasures taken by these companies at multiple levels in order to mitigate the soft error effects at a cost acceptable for commercial products. In a fast moving field, where the impact on ground level electronics is very recent and its severity is steadily increasing at each new process node, impacting one after another various industry sectors (as an example, the Automotive Electronics Council comes to publish qualification requirements on soft errors), research and technology developments and industrial practices have evolve very fast, outdating the most recent books edited at 2004.
Circuit and Layout Techniques for Soft-error-resilient Digital CMOS Circuits
Circuit and Layout Techniques for Soft-error-resilient Digital CMOS Circuits - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook Circuit and Layout Techniques for Soft-error-resilient Digital CMOS Circuits write by Hsiao-Heng Kelin Lee. This book was released on 2011. Circuit and Layout Techniques for Soft-error-resilient Digital CMOS Circuits available in PDF, EPUB and Kindle. Radiation-induced soft errors are a major concern for modern digital circuits, especially memory elements. Unlike large Random Access Memories that can be protected using error-correcting codes and bit interleaving, soft error protection of sequential elements, i.e. latches and flip-flops, is challenging. Traditional techniques for designing soft-error-resilient sequential elements generally address single node errors, or Single Event Upsets (SEUs). However, with technology scaling, the charge deposited by a single particle strike can be simultaneously collected and shared by multiple circuit nodes, resulting in Single Event Multiple Upsets (SEMUs). In this work, we target SEMUs by presenting a design framework for soft-error-resilient sequential cell design with an overview of existing circuit and layout techniques for soft error mitigation, and introducing a new soft error resilience layout design principle called LEAP, or Layout Design through Error-Aware Transistor Positioning. We then discuss our application of LEAP to the SEU-immune Dual Interlocked Storage Cell (DICE) by implementing a new sequential element layout called LEAP-DICE, retaining the original DICE circuit topology. We compare the soft error performance of SEU-immune flip-flops with the LEAP-DICE flip-flop using a test chip in 180nm CMOS under 200-MeV proton radiation and conclude that 1) our LEAP-DICE flip-flop encounters on average 2,000X and 5X fewer errors compared to a conventional D flip-flop and our reference DICE flip-flop, respectively; 2) our LEAP-DICE flip-flop has the best soft error performance among all existing SEU-immune flip-flops; 3) In the evaluation of our design framework, we also discovered new soft error effects related to operating conditions such as voltage scaling, clock frequency setting and radiation dose.
Soft Error Reliability of VLSI Circuits
Soft Error Reliability of VLSI Circuits - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook Soft Error Reliability of VLSI Circuits write by Behnam Ghavami. This book was released on 2020-10-13. Soft Error Reliability of VLSI Circuits available in PDF, EPUB and Kindle. This book is intended for readers who are interested in the design of robust and reliable electronic digital systems. The authors cover emerging trends in design of today’s reliable electronic systems which are applicable to safety-critical applications, such as automotive or healthcare electronic systems. The emphasis is on modeling approaches and algorithms for analysis and mitigation of soft errors in nano-scale CMOS digital circuits, using techniques that are the cornerstone of Computer Aided Design (CAD) of reliable VLSI circuits. The authors introduce software tools for analysis and mitigation of soft errors in electronic systems, which can be integrated easily with design flows. In addition to discussing soft error aware analysis techniques for combinational logic, the authors also describe new soft error mitigation strategies targeting commercial digital circuits. Coverage includes novel Soft Error Rate (SER) analysis techniques such as process variation aware SER estimation and GPU accelerated SER analysis techniques, in addition to SER reduction methods such as gate sizing and logic restructuring based SER techniques.
Soft Error Reliability Using Virtual Platforms
Soft Error Reliability Using Virtual Platforms - read free eBook in online reader or directly download on the web page. Select files or add your book in reader. Download and read online ebook Soft Error Reliability Using Virtual Platforms write by Felipe Rocha da Rosa. This book was released on 2020-11-02. Soft Error Reliability Using Virtual Platforms available in PDF, EPUB and Kindle. This book describes the benefits and drawbacks inherent in the use of virtual platforms (VPs) to perform fast and early soft error assessment of multicore systems. The authors show that VPs provide engineers with appropriate means to investigate new and more efficient fault injection and mitigation techniques. Coverage also includes the use of machine learning techniques (e.g., linear regression) to speed-up the soft error evaluation process by pinpointing parameters (e.g., architectural) with the most substantial impact on the software stack dependability. This book provides valuable information and insight through more than 3 million individual scenarios and 2 million simulation-hours. Further, this book explores machine learning techniques usage to navigate large fault injection datasets.
